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IDEZCA Forum Catalogue 2017WEB .pdf



Nome del file originale: IDEZCA-Forum-Catalogue-2017WEB.pdf
Titolo: VMEbus Systems - June 2004
Autore: OpenSystems Publishing

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Including VXIbus

Volume

22

T A B L E

/

Number

O F

COLUMNS

3

/

June

2004

C O N T E N T S
FEATURES

8

20

Military Technology Insider
FPGAs’ impact on next generation
sensor digital signal processing
By Duncan Young

10

24

VITA News
Understanding the new VITA
specifications
By Ray Alderman

14

VMEbus Technology
By Hermann Strass

18

Editor’s Foreword
VMEbus alive and advancing ...
By Mark David Barrera

APPLICATION FEATURE: Scientific
The technical challenges of building the
world’s most powerful telescope
By Jason Smith, University of Arizona
SPECIAL FEATURE: VITA Updates
Giving VME backplanes a shot in the arm
By Justin Moll and Michael Munroe,
Bustronic
What engineers need to know about
VXIbus System Specification 3.0
By Scott Kovner, National Instruments

33

108

New Products

COTS TECHNOLOGY FEATURE:
Multiprocessing
Distributed memory or shared memory?
By Doug Clarke, Synergy Microsystems
Want to increase the performance of your
VMEbus-based systems?
By Jürgen Eder, SBS Technologies

COVER CREDITS:
Four Synergy Microsystems Cougar 10 SBCs will be used to control the Large
Binocular Telescope (LBT) under construction in Arizona.

41
57

PRODUCT GUIDE:
SBCs – RTOS – Semiconductors
VME/VXI PRODUCT DIRECTORY

correction
The incorrect Concurrent Technologies SBC was shown as Figure 1
on page 14 of the April issue. The correct SBC can be found at
http://www.gocct.com.

www

VMEbus
Systems
published by:

OpenSystems
PublishingTM

VMEbus-systems.com

4 / VMEbus Systems / June 2004

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©2004 OpenSystems Publishing

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Free Information

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Advertiser Index
RSC#

Advertiser/Product Description

RSC#

3801
109
47
39

ACT/Technico – VMEbus AppliPaks
ACT/Technico – Switched Fabric Ethernet
Actis – Single Boards
Alphi Technology – MIL-STD-1553,
Analog I/O, PMC Modules, Industry Packs
Arrow – OEM Computing Solutions
Ascor – Ascor Model 38xx
Boonton Electronics – VXI Driver
Bustronic – Switched Fabrics
CG Mupac – Computing Solutions
Concurrent Technologies – VME &
CompactPCI Single Board Computers
Critia – V1.5 2eSST PrPMC Carrier
Dy 4 – Single Board Computers
ELMA Electronic – VME Enclosures
ELMA Electronic – cPCI & VME64x
Handles
Excalibur Systems – Excalibur Analysis
Laboratory Tools
Force Computers – Commercial, Rugged
Board and System-Level Products
GE Fanuc Automation – Embedded
Solutions
General Standards – High Performance
Bus Interface Solutions
Highland Technology – VME, VXI,
Custom/OEM
ITCN – VME Chassis and Mil-Std-1553
Busses
MEN Micro – SBCs for VME, cPCI,
PC/104+ and Computers-On-Modules.
Mindready Solutions – 18 Port IEEE1394b VME
Motorola Computer Group – VME,
CompactPCI, AdvancedTCA, MXP
N.A.T. – NPMC-8280-4E1/T1
Oregon Micro Systems – Multi-Axis
Motion Controller

2501 Phoenix International – VME Plug-In
Mass Storage Solutions
53
Racal Instruments – PXI Chassis and
Modules
1701 Red Rock Technologies – VMEbus Mass
Storage
19
Sabtech Industries – Data Systems
115 SBS Technologies – VME64 Bus Adapter
33
Schroff US – Subrack
2601 Sundance DSP – SMT319 Advanced
Imaging Module
801 Sundance DSP – SMT300 cPCI 3U Carrier
with Sundance Module
3101 Sundance DSP – SMT387 Disk Storage
Module
2901 Sundance DSP – SMT390 ADC Module
32
Systran – Microsecond Data Transfers
2902 Technobox – Adapters and Tools for
PMCs
27
Technobox – PMCs and PIMs for
Accessing SCSI and IDE Devices
2502 Technobox – PMC Boards
40
Thales – Single Board Computers
112 Themis Computer – UltraSPARC COTS
7
Tundra Semiconductor – VME Bridging
15
Universal Switching – Switching
23
VISTA Controls – Military CompactPCI
SBC
56
VITA – VME Technologies
2
VMETRO – Real-Time Data Recorders
113 Voiceboard – Switching, Conference &
Intercom
114 VXI Technology – Signal Switching,
Functional Test Instrumentation, Noise
and Vibration, Data Acquisition and Signal
Conditioning

43
107
5
30
22
35
12
111
21
55
13
16
9
116
2602
3802
802
11
3
1702
3102

Advertiser/Product Description

For further information about any one of our vendors or products in VMEbus Systems
magazine, visit www.vmebus-systems.com and click on Reader Service. Here you will
enter the Reader Service Card number (RSC#) in the appropriate boxes. Once you have
successfully entered your selections click on Submit.

6 / VMEbus Systems / June 2004

SENIOR TECHNICAL EDITOR

Terri Thorson
tthorson@opensystems-publishing.com

TECHNICAL EDITOR

Chad Lumsden
clumsden@opensystems-publishing.com

ASSOCIATE EDITOR

Anne Fisher
afisher@opensystems-publishing.com

NEW PRODUCTS EDITOR

newproducts@opensystems-publishing.com

VMEbus NEWS EDITOR

clong@opensystems-publishing.com

VXI NEWS EDITOR

clong@opensystems-publishing.com

VICE PRESIDENT OF EDITORIAL

Rosemary Kristoff
rkristoff@opensystems-publishing.com

CONTRIBUTING WRITERS

Ray Alderman, Duncan Young

MANAGING EDITOR
Bonnie Crutcher

ART DIRECTOR

Stephanie Sweet

SENIOR WEB DESIGNER
Konrad Witte

WEB DEVELOPER
Eric Okorie

BUSINESS MANAGER

Karen Layman (586-415-6500)

CIRCULATION/OFFICE MANAGER

Phyllis Thompson
subscriptions@opensystems-publishing.com

EUROPEAN REPRESENTATIVE
Herman Strass

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Editor’s Foreword
VMEbus alive and advancing...

W

elcome to the Special VITA edition of VMEbus
Systems. This issue illustrates the ongoing transformation of the VMEbus and its applications due
to the development of the governing VITA specifications.

The Special VXI System Specification
3.0 feature, by Scott Kovner of National
Instruments, describes how the consortium has further advanced
the VXIbus bus while observing VITA standards.

The VITA News column, by Ray Alderman, is an overview of the
following VITA specification efforts:

The Scientific Application feature describes the use of a Synergy
Microsystems VMEbus SBC to control the Large Binocular
Telescope (LBT) in southeastern Arizona. This feature demonstrates how VMEbus boards continue to be designed into stateof-the-art applications.

■ V-1.1 – This specification defines a seven-row DIN connector that is 100 percent backward compatible with the existing
five- and three-row connectors.
■ V-31.1 – This specification defines the addition of a switchedEthernet network to the present P-0 2mmHM 96-pin connector.
■ V-41 – This specification defines the VME Switched Serial
(VXS) architecture. This architecture required an update to
the 2mmHM connector in order to support fabric interfaces
at or above 2.5 GHz.
■ V-46 – This specification is primarily for helicopters and
avionics at the present time, and it also requires an update to
the 2mmHM connector in order to support higher frequencies and pin densities.
The Special VITA feature, by Justin Moll and Michael Munroe
of Bustronics, ties the development of the above VITA specifications to new and enhanced VITA applications.

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In whole, this issue clearly illustrates that VMEbus supports
today’s applications and will continue to support applications far
into the future. I hope you will find my debut issue as Sr. Technical
Editor of VMEbus Systems to be a useful addition to your library
of VMEbus publications. As always, I encourage your comments
and suggestions concerning this and future issues. Ω

Mark David Barrera
Sr. Technical Editor
VMEbus Systems Magazine
mbarrera@opensystems-publishing.com

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VMEbus Systems / June 2004 / 9

FPGAs’ impact on next generation
sensor digital signal processing
By Duncan Young
Sensors of all types are the eyes, ears,
nose, and antennae of the military commander whether they are integrated into
a main battle tank, a submarine, a helicopter, or a tactical aircraft. Sensors can
be active (laser range-finder, radar, and
sonar), or passive (optical, infra-red,
sonar, and radio frequency). Individual
sensors are used to identify an individual
target for the soldier or to identify and
track an enemy aircraft. Multiple sensor
platforms are used to create a complete
air, land, and sea situational picture
for the battle commander. Regardless
of where in the electromagnetic, visual,
sound, or organic spectra the sensor is
operating, the received signals are processed digitally and the resulting data
is used to construct an interpretable
model that allows the system controllers
to take the appropriate action.
Dedicated digital signal processing devices have evolved alongside conventional
microprocessors for many years. DSP
devices were optimized to perform DSP
application operations such as Fast Fourier
Transforms (FFTs) and the rapid transfer
of data blocks between multiple devices.
But they were very poor general purpose
processors. This resulted in the development of hybrid systems consisting of
optimized front-end DSP processors, and
multiple back-end general purpose processors for system management, communication, and display functions. The
gate count and speed of DSP devices
developed rapidly, which made the use
of an increasing number of DSP devices
economically viable. This development,
together with improved analog-to-digital
speed and conversion accuracy, increased
overall system sensitivity and hence the
quality of the received data. In addition to
increased sensitivity, more channels are
being introduced into the sensor systems

10 / VMEbus Systems / June 2004

for either full 3D coverage in the case of
radars and sonars, or for increased coverage of frequency bands for digital radio,
signals intelligence, or electronic warfare
systems.
The development of the PowerPC architecture and the AltiVec vector processor
by Motorola signaled the convergence
of general purpose processing and DSP
into a single device. The AltiVec executes
floating point FFTs as fast as competing
specialized DSP devices, and its PowerPC
processor means it can be programmed
easily using COTS tools that are currently
available from multiple vendors. PowerPC
with AltiVec is now the established processor of choice for embedded DSP processing. In VMEbus form it can be used
singly (as a SBC), or in higher density dual
and quad configurations at the board level.
With the addition of suitable switched fabrics for very high speed movement of data
between processors, a very large array of
processors can be constructed. The array
could be mounted in a single VME enclosure, or it could span multiple enclosures
for complex systems such as sonar or
Synthetic Aperture Radar (SAR).
While these large systems are functionally sound, there is yet another alternative
waiting in the wings ready to bring about
a return to the hybrid architectures of earlier DSP systems, but with major savings
in real estate and overall system cost. In a
typical system, the initial front-end filtering and processing (decimation and FFT)
would ideally be performed by hardware
as these are repetitive established algorithm operations. However, this has been
prohibitively expensive for small volume
production, and especially prohibitive
in the case of multiple channel applications. The advent of RAM-based Field
Programmable Gate Arrays (FPGAs) such

as the Xilinx Virtex-II Pro family, with
as many as 100,000 logic cells, multipliers, and internal RAM, clocking at
400 MHz+ swings the economic pendulum back towards a front-end hardware
solution. Unlike a PowerPC or dedicated
DSP processor, an FPGA can be designed
to perform multiple operations in parallel
on an incoming data stream. Previously,
this kind of parallelism required a large
number of PowerPCs with the attendant
data distribution issues. This issue is
easily solved if all of the PowerPCs are
located on a single VME card, but the
solution is much more complex if the
data is spread across a number of cards
or racks. Because an individual PowerPC
will generally process the data from a
sensor source serially and has to rely on
switched fabrics for rapid data movement,
there is often a need for additional design
margins to cope with a reduced level of
determinism. FPGAs, being logic-based,
operate deterministically and do not
require the overhead of frequent synchronization. The use of FPGAs in the critical front-end can result in substantial cost
savings on the order of 10x PowerPCs.
An FPGA such as the Virtex-II Pro also
has a number of dedicated very high speed
I/O channels, for example, RocketIO
running at 3 GHz+ to input sensor data
at high speed as well as being used to
transfer blocks of data from one FPGA to
another. In addition, the Virtex-II Pro contains PowerPC cores that could be used
for more of the generic processing functions using all the traditional PowerPC
development tools for support. The in situ
reprogrammability of the FPGA also
allows for adaptive algorithms that could,
for example, adopt different DSP configurations depending on the operating
mode required of a sensor. An example
of this might be a multi-mode radar that

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VMEbus Systems / June 2004 / 11

is equally effective at long range surveillance and very short range weapons direction against multiple threats.
It would then seem that FPGA-based DSP
is set to displace the front-ends of the large
and complex systems in use today, making
VMEbus and COTS products redundant.
After all, FPGAs are single devices. Does
this point backwards to the reintroduction
of proprietary architectures with all their

attendant development, maintenance,
upgrade, and sustainability risks? To do
so would be to ignore the huge investment
legacy in the infrastructure and architecture of VME and all its complementary
standards that have made current systems so powerful and reliable, particularly in harsh environments that require
conduction cooling and resistance to the
effects of shock and excessive vibration.
It is also very unlikely that a complete
sensor system such as a radar or sonar
could be constructed exclusively from
FPGAs. There is a significant amount
of general purpose processing that still
has to be performed on the data streams
before any meaningful interpretation or
defensive/offensive reaction can be taken,

e.g., targets must be identified and classified, threats evaluated, and weapons/
evasive systems deployed. All of these
defensive/offensive reactions will be initiated by decision makers who require the
use of significant logical and decisionbased processing and information sharing
applications. These applications are ideal
for general purpose, embedded computers
such as the PowerPC.
Even though very few of today’s DSP systems actually make use of the VMEbus
itself, they rely on the wealth of VME standards and the industry’s product base for
their infrastructure, support, interconnect,
packaging, and network fabrics. Often
VME is only used for system initialization,
self-test, and management using a general
purpose SBC in Slot 1 of the chassis, while
dedicated I/O, PCI, and switched fabrics
are used for the DSP application. New
FPGA-based DSP products are now being
introduced into this infrastructure and
support environment. A 6U VME card can
accommodate two or more FPGAs, a large
complement of 64-bit and 128-bit DDR
and DDRII SRAM, two PMC/XMC sites,
a local PowerPC controller, and a pair of
switched fabric interconnects. RocketIO
ports will be used to connect to the sensor
digital data streams, to pass data between
the onboard FPGAs, and to provide external links to other FPGA cards. Products
are now available from several defense
and aerospace-focused vendors who
provide complete system-level solutions
which connect FPGA front-ends to existing multiple PowerPC processor products via their preferred switched fabrics,
e.g., Mercury Computers with Race++
fabric interconnect, and Dy 4 Systems
with StarFabric. As an example, the Dy 4
Systems CHAMP-FX DSP board which
incorporates two Xilinx Virtex-II Pro
FPGAs for digital signal processing is
shown in Figure 1.
Interestingly, the introduction of fully
supported FPGA-based products for
DSP applications might cause a further
convergence between hardware and software development engineers. Is an FPGA
a piece of hardware or software and to
which discipline does it belong during its

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12 / VMEbus Systems / June 2004

Figure 1

development? The use of development
tools and libraries is likely to be the discriminator, with logical and embedded
tools to be used by hardware engineers,
while graphical/mathematical tools such
as MATLAB to be used by software and
systems engineers.
The use of proven infrastructure and
architecture to incorporate FPGAs into
a new or upgraded DSP system is key to
implementing a successful and economical solution.
VITA recognized the need to incorporate
many of the features required for these
new DSP solutions in the development of
standards such as VITA 34, 41, and the
recently announced VITA 46. VITA 46
will offer radical new capabilities for
VME systems deployed in harsh environments with support for multiple switched
fabrics, improved I/O connectivity, and
the support of Gbit+ signaling rates
through the backplane connectors. These
connectors can be used for high-end
radar, sonar, graphical, and digital radio
DSP applications. Applications such as
the radar system used on the AWACS aircraft (Figure 2) will employ FPGA-based
DSP solutions.

Figure 2
The FPGA has become a key component
in the battle to increase the sensitivity
and performance of sensor systems while
reducing cost, power, and space requirements. As usual, VME and its infrastructure
have evolved to remain the ideal platform
for implementation thereby encouraging
migration from existing systems, and the
development of new systems. Ω

For more information, contact:
Dy 4 Systems Inc.
333 Palladium Dr.
Kanata, Ontario
Canada K2V 1A6
Tel: 613-599-9191 • Fax: 613-599-7777
E-mail: info@dy4.com
Website: www.dy4.com

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By Ray Alderman

Understanding the new VITA specifications
While it is fun to watch companies strip off their R&D and marketing costs, it is time to take a look at
more realistic markets. I have been getting a number of phone calls from users asking about the new VITA
specifications (V-31.1, V-41 VXS, V-46, and V-1.1). Each specification has a logical progression, and each
specification addresses the varying requirements of an applications niche. In addition, the first two specifications comply with the philosophy VITA has had from the beginning: adopt, adapt, and then create
new technologies for VME.

VITA V-31.1
V-31.1 basically adds a switched-Ethernet network to the
present P-0 2mmHM 96-pin connector. It has severe limitations
in bandwidth (about 1.3 GHz) compared to new connectors on the
market, but it will work with 1 GHz Ethernet chips and switches.
V31.1 allows users to add 1 GHz Ethernet connections or a 1 GHz
Ethernet switched network to the P-0 connector, but still maintain
complete backward compatibility to previous VME cards. Many
users have tremendous investments in their I/O cards, and this
allows those users to technology-insert new technology without
throwing out all of their previous hardware and software. That
has always been a goal for VITA: to preserve the investments our
customers have made while enabling them to adopt and insert
newer technologies. It is true that you must change the backplane
to accept the new 2mmHM connector in some switch or network
configurations, but all of the previous VME cards will function as
normal in this new backplane.
VITA V-41
V-41 or VME Switched Serial (VXS) architectures are about
multiprocessing and multi-computing. Since the 2mmHM connector is bandwidth challenged, and all of the new fabric interfaces are at or above 2.5 GHz, we had to change the connector
to a more advanced version. The VITA Standards Organization
(VSO) chose the RT-GIG connector from Tyco and Erni. This
new high-speed connector is capable of 2.5 GHz connections and
higher frequencies, but it is not backward compatible with the old
2mmHM connector.
With high-speed serial fabrics, you can hook together multiple
processors using InfiniBand, Rapid I/O, and eventually PCIExpress and Advanced Switching. Also, you can subdivide 10 GHz
Ethernet connections into four channels of 2.5 GHz each with this
new capability.
Many users have applications in the supercomputing arena that
can take advantage of this new higher-speed architecture, but
again, you must change out the backplane to get the fabric networked traces and the new RT-GIG connector. As with V-31.1,
all previous VME cards will run fine in the VXS backplane. This
continues our efforts to protect user investments in I/O cards and
software, but allows them to add new technology in an existing
VME system with a minimal amount of disruption and cost. To
date, we have seen a lot of application interest for VXS-enabled

14 / VMEbus Systems / June 2004

systems in medical equipment, signal processing, and simulation.
I anticipate that more market segments will develop as VXSenabled products start flowing into the market from numerous
manufacturers. Look at V-41 (VXS) as a supercomputing architecture that can maintain the backward compatibility of legacy
I/O domains, but can offer fabric connections to many processors
and will allow customers to feed streaming I/O (from sensors
and other devices) into a processor network through the backplane. Expect to see V-41 compliant products in the marketplace
in the next few months. We have already seen VXS backplane
announcements from several vendors.
VITA V-46
At the current time, V-46 is primarily about helicopters and avionics. The 3U cards seem to be generating the most interest at this
time. Any 3U card is pin limited with previous generation connectors, and the old 2mmHM connector cannot handle the higher
frequencies and pin densities. Again, the VSO Committee chose
the RT-GIG connector to get the needed density and bandwidth.
I expect to see V-46 boards in new helicopter electronic systems.
The military are dropping new helicopter programs and relying
on updating the Longbow, the Apache, and even the UH-1X Huey
helicopter platforms from the Vietnam War with new electronics.
New avionics platforms are also planned for fighter planes, attack
jets, and other airframes. The military want to reduce the weight of
the equipment in those platforms, reduce their costs, and increase
the effectiveness of those systems. These needs are being integrated into the V-46 specification. There has been a great deal of
interest from a number of users and other companies about V-46.
We will probably see product demos and announcements by the
end of this year, and the specification should be completed about
the same time. I expect to see a number of V-46 boards that are
Conduction Cooled (CC). That will be a relatively easy task since
the original CC specification requirements are easily transferable
to the V-46 platforms. As the V-46 market develops, I also anticipate 6U applications especially for shipboard and ground-based
applications.
Look at V-46 as a specialized version of V-41, but with some
notable differences. In the 3U applications, there is no need for
backward compatibility requirements. The V-46 systems will
be newly designed systems for avionics, so there is not much
legacy to support. Using the RT-GIG connector, you can also

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16 / VMEbus Systems / June 2004

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input high-speed serial connections from sensor systems and
other streaming data sources through the backplane, something
that is required but not supported in previous VME documents
(much of that has been done through the front panel in the past).
As a result, V-46 is a new VME paradigm for mechanicals and
connectors, but the VMEbus can be resident on the new connector, and compliant V-46 boards can run off the regular VMEbus
backplane, or the boards can be linked together with one of the
fabrics coming to market.
VITA V-1.1
Finally, there is V-1.1. This standardization effort seeks to define
a seven-row DIN connector that is 100 percent backward compatible to the five-row DIN and the original three-row DIN on
legacy VME cards. Not every user or application requires fabrics or high-speed connections. Many applications simply want a
higher pin density and a lower board density in their systems for
discrete I/O lines. V-1.1 seeks to perpetuate the traditional VME
requirements in many legacy and new applications.

before fabric-based computers will be openly adopted. There are
some application segments that can obtain benefits from fabrics
today, and those are the targets for the V-41, V-46, and V-31.1
specifications. The V-1.1 specification maintains the backward
compatibility of legacy boards and applications that will be slow
to adopt the new fabric technologies for various reasons.

Contrary to all the hype and rhetoric in the market
about serial fabrics completely replacing buses in a
matter of months, there are a lot of customers and
applications that have no desire to change . . .

Contrary to all the hype and rhetoric in the market about serial
fabrics completely replacing buses in a matter of months, there
are a lot of customers and applications that have no desire to
change, and they are not being pressed to change their complete
architecture and software. The fabric wars have yet to begin. The
software for switch management, load sharing, load monitoring,
etc. has yet to be written. It will take at least another five years

Conclusions
So, now you know where all these new specifications fit, what
they are supposed to do, and how they are supposed to work.
Different markets have different requirements, and this new
series of specifications are responding to those customer and
market needs. At the same time, these new specifications will
attract new markets for VMEbus products that could not be
attracted in the past. Each of these new segments has a market
potential of hundreds of millions of dollars, depending on the
ebb and flow of new semiconductor technology coming down
the pike. But V-41 and V-46 have the ability to accommodate
whatever the semiconductor companies throw at us in the next
four to five years, including 10 GHz connections on a single copper differential pair. Standby for future updates. Ω

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VMEbus Systems / June 2004 / 17

By Hermann Strass

VMEbus technology products
and projects
Several unique products were released at
CAEN (Italy) including low cost serial
interface boards for USB 2.0 (VMEbus
card V1718), and two versions of an optical link board (V2718 and V2818) that act
as a PCI extension (PCI-to-VME bridge).
All three boards are usable without a boot
operation. A V2818 board can daisy chain
up to eight V2718 boards. The boards are
used individually or as part of the chainable optical network. All boards also feature Ethernet, RS-232, a network-interface
module, and TTL I/O. Status is shown on
the front panel dataway display with LEDs
for 32-data and 32-address bits, and LEDs
for all of the significant VMEbus control signals. Equivalent APIs are used for
Windows and Linux-based environments.
Ready-to-use Virtual Instrument software
is available for the LabVIEW software
suite from National Instruments.
Interface Concept (France) announced
an additional VMEbus card in their
communications line of products. The
ComEth4100 VMEbus board provides up
to 10 Ethernet or Gigabit Ethernet ports
(10/100/1000Base-T) (see Figure 1).

Figure 1
One port can be equipped with an LX or
SX port. The ports are available on the
front or rear panel. The board may be used
simply as an I/O board or in a VITA 31.1
configuration. A CompactPCI version is
also available. The non-blocking Ethernet
switch matrix may be used in virtual
local area networks applications (IEEE
802.1Q). An optional PowerPC processor
can improve performance significantly, if
needed. The conduction-cooled VMEbus
board version is available for use in ruggedized systems. The low-power board

18 / VMEbus Systems / June 2004

can be managed and configured locally,
by program, or via a web browser.
Radstone Technology (UK and USA)
offers a liquid-cooled chassis variant
within its Air Transport Rack (ATR) chassis line. The chassis can be connected to
an existing cooling system using a variety
of coolant liquids, or it can be equipped
with its own pump and heat exchanger.
The liquid-cooled chassis can remove up
to five times the amount of heat compared
to forced air cooling. This allows for considerable space reduction.
Business information
Boards & Solutions 2004 was held in
Reading, UK in March. The one-day
conference and exhibition attracted more
than 100 delegates to its conference section where attendees chose from presentations in three parallel tracks. A number
of VMEbus manufacturers and resellers
from the UK and Continental Europe
presented products or applications during the sessions. The next two events
in this series will be held on June 23 in
Duesseldorf, Germany and on June 30 in
Munich, Germany.
The Hannover-Messe 2004 Exhibition
and Conference will be held in Hannover,
Germany from April 19 to April 24. Close
to 6,000 exhibitors will exhibit their products. This year, the world’s largest industrial trade fair includes the Interkama Show
(process control and chemical industry
automation), the Factory Automation
Show, and the Digital Factory Show.
Applications using VMEbus
technology
Local Interconnect Network (LIN) is an
extremely low cost serial fieldbus which
is mostly used in car applications. It is
approximately 50 percent less expensive
than the Controller Area Network (CAN),
or the J1890 bus system which is widely
used in cars, SUVs, or trucks. Common
applications are mirror control, window
movement, seat adjustment, air conditioning, and door locking. ETAS (Germany),
the former electronic control division
of the Bosch group, has developed a
VMEbus-based analyzer (ES1223.1) that

provides four LIN,
two CAN, and two
RS-232 interfaces.
The interfaces are
galvanically separated (potentialfree). The VMEbus board provides all
power for all the interfaces and for the
onboard CAN-LIN gateway. If used
together with a VMEbus host (ES1130)
in an ES1000.2 chassis, this analyzer
becomes part of a “Rapid-Prototyping
System.” Software tools are available for
the ASCET-SD development environment
from ETAS.
Mektron (UK) and Miltron (USA) specialize in the design, development, and
manufacture of turnkey, bus-based system
enclosures or subsystems for commercial
and military applications. Several patented
features and processes make it possible to
comply with some of the most extreme
weight, cooling, and Electromagnetic
Interference (EMI) requirements. These
features include the lightweight, high
tensile strength extrusions that are used
in their patented “High Integrity Frame.”
This includes thermal and EMI protected
hermetic gasket channels. Carbon fiber
panels and structural elements, including
carbon fiber air ducts, are used when an
extremely lightweight solution is required.
A unique patented air-to-air heat exchanger
is used when a great deal of heat has to
be removed in a space constrained environment. In a chassis with indirect forced
air cooling there isn’t any contamination
from dust, gases, or moisture. Mektron’s
Crush-Fold technology provides a costeffective, high strength, and superior
EMI seal which requires a minimum of
fasteners. Customized versions of these
card cages for extreme cooling and EMI
requirements are used in military “rapiddeployment systems” for “in-the-field”
testing and analysis of airborne or landbased electronic systems and subsystems.
For applications where hard disk usage
is required, Mektron has fitted the hard
disks with 3D shock-protected mounting
to survive extreme shock and vibration
conditions. In addition, Mektron supplies
customized backplanes based on VMEbus
or other technologies. Ω

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VMEbus Systems / June 2004 / 19

APPLICATION FEATURE

Scientific

The technical challenges of building
the world’s most powerful telescope
By Jason Smith
It has been realized worldwide that, for optical and infrared observations, new advanced
mountaintop telescopes offer huge potential for future discovery. Mountaintop telescopes more
powerful than the Hubble Space Telescope (HST) can be built quicker and at less expense.
Distances far greater than those possible with the HST can be observed from the ground, which
will allow for detailed analysis of fainter and more distant sources. Moreover, the latest sensors,
optics, and other technological advancements can correct atmospheric blurring and thus
enormously improve image sharpness to a level far above that of the HST.
This article discusses the technical challenges in the design and construction of the Large Binocular
Telescope (LBT) at the Mt. Graham International Observatory (MGIO) in southeastern Arizona.
Mirror design
The Mt. Graham International Observatory
was selected for the 10-story, $100 million
project because of the 10,000-foot altitude,
the low humidity, and the minimal amount
of ambient light given off by nearby cities.
While the HST was put into space to overcome the limitations of the atmosphere
(e.g., air mass, and dust), the LBT overcomes atmospheric and additional limitations through the use of adaptive secondary
mirrors and a two-primary mirror design.

The tertiary mirrors rotate to direct light
to several central instrument locations.
The tertiary mirror is mounted to a simple
tip/tilt XYZ platform and will be controlled by a Linux computer system.
Key technical challenges in
supporting the LBT primary
mirrors
The key to the success of the LBT project
lies in the primary mirrors. At a cost of
more than $8 million, each primary mirror weighs approximately 16 metric tons.
A single primary mirror is shown in
Figure 2.

The two-primary mirror design consists
of two 8.4-meter (331-inch) mirrors on
a common mount. This telescope will be
equivalent in light-gathering power to a
single 11.8 meter instrument. Because of
its binocular arrangement, the telescope
will have a resolving power (ultimate
image sharpness) corresponding to a
22.8 meter telescope. As a result, the LBT
will have a collecting area larger than any
existing telescope, and will therefore provide unmatched sensitivity for the study of
faint objects.

In addition to the two primary mirrors,
the design utilizes a pair of curved secondary mirrors and a pair of flat tertiary
mirrors to implement the focal stations
and cancel the distorting effects of the
earth’s atmosphere. These smaller optics
are moved in and out of the light path by
swing arms.

The University of Arizona Steward
Observatory Mirror Lab was responsible
for the fabrication and polishing of the
two primary mirrors. The construction of
the first primary mirror took four years,
and included the creation of the mold,
glass loading, casting, and removing and
grinding/polishing of the mirror. The second primary mirror is about to enter the
polishing phase, and is scheduled to be
installed in late 2005. The LBT and its
primary mirrors are shown in Figure 1.

The adaptive secondary mirror is mounted
to a reference body via 672 actuators.
Wave front sensors read the atmospheric
distortion in real time, and then a computed force algorithm is used to determine
how much actuator force is necessary
to move the mirror to compensate for
the distortion. Using an array of digital
signal processors, the goal of the realtime loop is to execute at 1 KHz in order
to properly cancel the distortion effects of
the atmosphere.

20 / VMEbus Systems / June 2004

Figure 1

Figure 2

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APPLICATION FEATURE

Scientific
Because the time and cost to produce a
single primary mirror is so significant, the
design and operation of the mirror support
system is critical. Because the primary
mirrors are so heavy, they can literally sag
from their own weight and create distortion in the telescope’s view. To compensate, 160 actuator support points that can
make a minute correction to its section of
the mirror support the thick honeycombed
mirrors of the LBT.
The actuators are connected to the back
of the primary mirror via load spreaders and metal pucks that are glued to the
glass. The support actuators provide a
metered force that push or pull the back
of the mirror via precision controlled
pneumatic pistons. Each of the 160 actuators has a simple Programmable Interrupt
Controller (PIC) processor that communicates to a VMEbus SBC via an RS-422
serial channel.
The design goal of this configuration is
to simulate the primary mirror floating in

a liquid of equal density. The 160
support actuators try to simulate this model by applying a
corresponding force at specific
points on the back of the mirror.
The SBC determines and transmits
a force, and the actuator’s PIC processor
receives the force command via the serial
channel. The actuator then controls the
air pressure in its onboard piston/cylinder
to apply the necessary force to the back
of the mirror. A load cell attached to the
same glued-on puck is read by the SBC to
verify the value of the applied force.
VMEbus SBC selection
One of the biggest technical challenges
was to find VMEbus SBCs that can control the eight serial channels running
at 115.2 Kbaud which is the bandwidth
required to send the force command data
streams using a 37 Hz real-time loop
refresh cycle. After a careful analysis,
four Synergy Microsystems Cougar 10
SBC boards (see Figure 3) were selected
to make the mathematical computations

Figure 3
necessary to position and stabilize the two
massive primary mirrors.
Each SBC supports an algorithm with
a 37 Hz refresh rate in real time under
the VxWorks Operating System, and is
backed by a comprehensive VxWorks
Board Support Package. Synergy SBC
reliability was also a decision factor.
The four SBC boards are mounted in a
VME chassis approximately 50 feet from
the primary mirror cell in a temperaturecontrolled room within the telescope
structure.
International consortium
The LBT is under construction by an
international consortium that includes
Arizona State University, the University
of Arizona, Northern Arizona University,
Germany’s Max Planck Institute for
Astronomy, Ohio State Research Corporation, the University of Notre Dame,
and the Italian National Institute of
Astrophysics. Current schedules for the
telescope, mirror, and enclosure suggest
that first light will occur in summer 2004.
The LBT structure is expected to be completed in June 2005, and ready for use
by 2006. Once completed, it will have
the greatest light-gathering capacity of
any astronomical telescope in the world
according to project officials. Ω
Jason Smith is the technical coordinator
for the LBT project, and is responsible
for the mirror cells and their integration
into the LBT.
For further information, contact
Jason at:

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22 / VMEbus Systems / June 2004

LBT Observatory
University of Arizona
933 N. Cherry Ave.
Tucson, AZ 85721
Tel: 520-621-4562
Fax: 520-626-9333
E-mail: jasons@as.arizona.edu
Websites: www.synergymicro.com
or medusa.as.arizona.edu/lbto/

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SPECIAL FEATURE

VITA Updates

Giving VME backplanes
a shot in the arm
By Justin Moll
and Michael Munroe
The demise of VME has been greatly exaggerated. Nearly every year we hear how VME is
destined to fade away and at the 2004 Bus and Board conference, the talk in the halls proved
that VME will again have to face the same questions. What is different this time around is that
many of us in the VME community are starting to fight back. The battle is on two fronts: building
awareness of VME’s continuing advancement, and the new technological developments in VME
that will take us to the next level. For technical advancements, there are many. The Motorola-led
VME Renaissance and other VITA initiatives bring a wealth of new products and ideas for VME.
2eSST
You may have read of the new 2eSST technology that will bring
standard VME backplanes from rough theoretical speeds of 80
MBps to 320 MBps. As the developers of the VME320 backplane (in 1997 in cooperation with Bustronic’s consultant Drew
Berding), we are particularly interested in how the new 2eSSTenabled boards perform in a VME320 system. We believe that
the VME320 backplane would be a superior environment for the
incident wave signaling capability of 2eSST drivers. Such an
advantage might be of particular importance in very large systems
where the combination of low voltage signals and background
noise has created an adverse signaling environment. We are in

discussions with other vendors in testing the results. But, the
most promising of the next-generation VME backplanes appears
to be the VXS Backplane (VITA 41).
VXS backplane
The VXS Backplane starts with a standard VME64x backplane
design and implements a high speed fabric by replacing the existing P0 connector with a new high-speed MultiGig 7 Row connector and adding hub slots fully populated with the new connector.
The new MultiGig connector and hub slots carry the high-speed
switch fabrics, while the P1 and P2 connectors will support legacy VME64x cards (see Figure 1).

Figure 1

24 / VMEbus Systems / June 2004

SPECIAL FEATURE
This design maintains full backward compatibility while adding high-speed serial fabric connectivity. VITA 41 designers will
have the flexibility of plugging in standard VME64x cards for
parallel bus only, integrate VXS payload and switch cards for
parallel bus and switch fabric transport, or use the VXS cards
for switch fabric transport only. The current switched serial
interconnects utilized are Infiniband and Rapid IO. In the future,
other fabrics may also be implemented.
Design concepts for the VXS backplane
Accomplishing the dense routing on a 0.8-inch pitch with signals
at 3.125 Gbps or higher in the VXS backplane requires some
creativity. Even a mid-sized 12-slot Dual Star VXS backplane
configuration (see Figure 2) forces the designer to make some
difficult choices. One issue to avoid is letting the layer count get
too high. The costs rise considerably, the backplane performance
can suffer, and it prevents the use of available standard components (if the backplane is too thick, many standard connectors
don’t have long enough tails to fit through the board).
Another design concept is to avoid undesirable stubs for upper
layer backplane traces. This presents two options. One choice
would be to have these worst-case vias back-drilled – a costly
fabrication process which removes the unused portion of the
plated via structure below the layer at which the signal is terminated. The other choice is to minimize the length of via stubs by
choosing a laminate with a lower dielectric constant. This will
allow the 100-ohm differential impedance to be achieved with

Figure 2

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VMEbus Systems / June 2004 / 25

VITA Updates
thinner PCB layers. A lower dielectric constant (Er) is not the
only characteristic that makes higher performance board materials attractive. High-grade materials such as Nelco 4000-13SI,
Rogers 4350, and Mashusutta’s Megtron 5 also have significantly
lower loss tangent values at these higher frequencies. The loss
tangent value indicates a degree of undesirable interaction with
a signal at a given frequency. In the 12-slot Dual Star example,
Bustronic chose to develop the backplane using Nelco 4000-13SI.
The result is much improved signal integrity which provides better overall performance. This VXS backplane required 18 layers,
a manageable and reasonable number for a high-performance
backplane. For other future configurations (smaller slot counts,
Single Star configurations, etc.) a standard FR-4 laminate may be
sufficient, depending on the performance required.
As we demonstrated in previous AdvancedTCA papers, placing
the hubs centrally for a VXS layout in most Dual Star configurations is a good choice. It reduces the maximum trace length,
and there generally is a vast improvement in signal quality as
the losses due to dielectric and skin-effect will be considerably
smaller. Further, intelligent routing strategies can be implemented to minimize the layers count. Aside from lower PCB
costs, having fewer layers minimizes the stub influence and
improves the signal quality.

SPECIAL FEATURE
cation is being developed using many of the VITA 41 design
concepts. VITA 46 appears to sacrifice backwards-compatibility
for performance. One key goal is for more I/O signals. However,
hybrid versions of either VITA 41 or 46 can have the backwards
compatible VITA 41 payload slots with the 160-pin DIN connectors and slots on the side with all MultiGig connectors from top
to bottom for more I/O and connectivity. We’ll have to wait and
see how the specification evolves. Other backplane-based VME
technologies include VITA 31.1/31.2, and VITA 34.
Gigabit Ethernet over VME (VITA 31.1)
The VITA 31.1 backplane is very similar in concept to the VXS
backplane. However, it uses the standard 2mmHM connector in
P0. There is full backwards-compatibility with VME64x cards
with P0 connectors. However, you are limited to the performance
of the 2mmHM connector. At least one company has developed
node cards compliant to VITA 31.1, and a couple of backplane
vendors have designs in the queue that are ready to go to fabrication when needed. A VITA 31.2 specification has been initiated
for a StarFabric version.

There are also other new specifications today and on the horizon
for giving VME a boost in performance. The VITA 46 specifi-

Embedded modular (VITA 34)
VITA 34 is an aggressive and forward looking approach to
mechanical packaging. In some ways similar to AdvancedTCA,
it has a new form factor and may forgo the VMEbus altogether
(see Figure 1). One of the standout features is the use of liquid
cooling. The cards would be encased in metal, providing a

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26 / VMEbus Systems / June 2004

SPECIAL FEATURE
cooling mechanical format for the cards and greatly improving
shielding. Some in VITA feel that this will be critical as chip
speeds increase where heat dissipation and shielding become
much more important. The development for VITA 34 has not
moved forward as quickly as hoped. However, no one doubts
that new packaging technologies will be required for future
systems. Bustronic is working with other VITA members to
make sure that backplanes will be available to support our customers’ needs for new mechanical and environmental packaging designs.
VME awareness
Fed up with hearing how the 25 year old bus which is still the
most dominant player in standardized embedded systems is
doomed, members of VITA gathered to discuss how to combat
the industry’s critical misperceptions of VME. The misperception that has been held for many years is that VME is dead, that
the bus is too old and slow to keep up with today’s computing needs. The truth is that VME has continued to expand and
improve over time. From the 16-bit to 32-bit to 64-bit days,
and from J1 VME to VME64x to VME320, the technology has
progressed. Customers tell us that one of the great strengths of
the VMEbus is that so many products are currently available
for every potential application. We are working on innovative
designs to ensure that that legacy boards will continue to be
supported far into the future. The addition of a high speed P0
serial fabric will continue to breathe new life into the bus. The
VME marketing committee has been formed to build awareness
that VME continues to advance, strengthen the VME “brand,”
and develop more user-friendly tools for information on VME.
Contact VITA for more details.

gies. Justin was recently re-elected as the VP of marketing
for the StarFabric Trade Association. His previous positions
include marketing services manager for E21 Corporation and
account manager for Elcon Products International, now a
Tyco Electronics company. Justin received his bachelor of science degree in business administration from the University of
California, Riverside.
Michael Munroe is a technical specialist for Bustronic
Corporation. In addition to 18 years of experience in the packaging and interconnect industry, Michael is an active member
of the VITA Standards Organization, a professional member
of the IEEE, and an officer of the PCI Industrial Computer
Manufacturers Group (PICMG).
For further information, contact Justin and Michael at:
Bustronic Corporation
44350 Grimmer Blvd.
Fremont, CA 94538
Tel: 510-490-7388
Fax: 510-490-1853
E-mail: jmoll@bustronic.com
E-mail: mmunroe@bustronic.com
Website: www.bustronic.com

Simulation
Simulation is increasingly becoming a critical factor in highperformance backplane design. The fabrics used over VXS and
VITA 34 will have speeds of up to 2.5 Gbps per port or higher,
for a fabric channel bandwidth of 10 Gbps. Backplane designers will increasingly use simulation as part of their design for
both standard products and custom designs. These models are
increasingly being requested by SI engineers responsible for
leading edge system design. Bustronic has developed our Signal
Integrity Initiative (SII) to continuously enhance our backplane
measurement and characterization program. Later in the year,
Bustronic will provide new simulation data and models on various VXS backplane configurations, in addition to our data on
AdvancedTCA backplanes.
Conclusion
The age of the VMEbus (and the corresponding VITA standards)
creates a negative perception in the industry. However, it should
also be recognized that the legacy of VME provides a stable,
reliable, well understood technology with a wealth of vendors
and product availability. Just as important, the industry should
be aware that VME has evolved and improved over the years,
and will continue to do so. With new standards that advance the
technology like VITA 31, VITA 34, and VITA 41, the industry
can look forward to advanced VME solutions for today and well
into the future.
Justin Moll has more than 10 years of high-tech marketing
and sales experience and has been with Bustronic since
2000. As the director of marketing for Bustronic, he has led
the company’s charge in several next-generation technolo-

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SPECIAL FEATURE

VITA Updates

What engineers need to know about VXIbus
System Specification 3.0
By Scott Kovner
Last November, the VXIbus Consortium released revision 3.0 of the VXIbus System Specification.
This new revision brings a faster data transfer protocol (2eVME) and more address space (A64) to
ATE systems, while preserving compatibility. Engineers can use VXI 3.0 modules in their system if
the software can configure those new modules.
VXI Consortium
The goal of VXI (VMEbus Extensions for Instrumentation) is to
be an open VME-compatible platform for modular instrumentation which improves flexibility, modularity, footprint, speed, and
cost. VXIbus is defined by a family of specifications issued by
the VXI Consortium.

System Management

VXI extends VME with mechanical, electrical, and architectural
features. VXI defines scalability of these features across the following module sizes:

Application

â–  A-Size systems (3U) include resource management, word
serial (for IEEE-488.2 messages), shielding, and cooling
requirements.
â–  B-Size and C-Size systems (6U) add a trigger bus, local bus,
slot identification, and analog connections.
â–  D-Size systems (9U) provide additional triggering, including
a star trigger bus.
VXIplug&play Systems Alliance
The VXIplug&play Systems Alliance was formed to address
software interoperability. The alliance issued a separate family of
specifications that standardize the:
â– 
â– 
â– 
â– 

Soft front panels
Instrument driver functionality
VISA (Virtual Instrument System Architecture) library
Development environment frameworks such as LabVIEW and
C++ (see Figure 1)

VXI modules must include the software that implements these
specifications. For example, National Instruments controllers
include NI-VXI, NI-VISA, NI VXI Resource Manager, and NI
Measurement & Automation Explorer for managing VXI and
VME devices.
The VXI 3.0 Specification
The goals of VXI 3.0 are to improve backplane performance and
to enable the use of 64-bit processors for VXI control, while maintaining compatibility with previous VXI specifications. VXI 3.0
updates the VXIbus System Specification (VXI-1) to include the
2eVME protocol from VME64x, and the A64 address space from
VME64 (see Figure 2).
This is not the first time the VXIbus Consortium has brought new
VME64 technologies into the VXIbus specifications in order

28 / VMEbus Systems / June 2004

VXI ATE Architecture
• TestStand™, Switch Executive

• LabVIEW™, LabWindows/CVI™, C++

Test Management
Services

Test Programs

Measurement and Control Services
• NI-VISA™, IVI™, NI-VXI™, Instrument Drivers,
VXI Resource Manager, Soft Front Panels,

Instrument or
I/O Libraries

Configuration (MAX)

Computing
• VXIpc, Desktop PC with MXI-2

Device I/O
• Instruments, Data Acquisition, Motion, Vision

Figure 1
to improve systems performance. In 1998, VXI 2.0 added D64
transfers and the RETRY* signal to the VXI specification.
The 2eVME (2-Edge VME) protocol doubles the theoretical
throughput of VXI. While VXI 2.0 specified 64-bit data transfers at 80 MBps, 2eVME doubles the theoretical throughput to
160 MBps. The two edges that give the protocol its name are
the transitions in the data strobe and data transfer acknowledge
lines. The VXI 2.0 specification uses the four-edge handshake
protocol from VME64: two edges for asserting DS and DTACK,
and two more edges to de-assert DS and DTACK. The 2eVME
protocol in VXI 3.0 uses the last two edges to indicate a second
data transfer, thereby doubling the data rate. Although VME64x
defines 2eVME protocols for both 3U and 6U devices, the VXI

VXI Specifications
VXI 2.0

VXI 3.0

Theoretically up to 80 MBps
with 64-bit transfers
A16, A24, and A32 address spaces
Message-based support through
Word Serial Protocol
P2 connector supports 10 MHz
clock, 8 TTL trigger lines, 2 ECL
trigger lines, module identification,
local bus, analog summing bus
P3 connector supports
100 MHz clock, 4 more ECL lines,
24 more local bus lines, Star
Trigger lines

Adds 2eVME for up to 160 MBps
transfers, theoretically
Adds A64 address space
Unchanged
Unchanged

Unchanged

Figure 2
Consortium decided to simplify interoperability by recommending only the 6U protocol.
The new, separate A64 address space is capable of addressing
264 bytes (or 18 Exabytes) of memory and registers. The A16, A24,
and A32 devices do not occupy any of this new address space. VXI
uses the VME mechanism for 64-bit addressing, where the address
lines and data lines combine to form a 64-bit address.
Traditional VXI provides the following four address spaces:
â– 
â– 
â– 
â– 

A16 address space
A24 address space
A32 address space
A reserved address space

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VXI 3.0 uses the reserved space to indicate that the VXI device
capabilities are stored in a new Enhanced Capabilities Register.
The VXI Resource Manager must now decode this new register
to determine if the device is an A64 device. Defining this new
register, instead of simply using up the fourth address space,
leaves room for additional address spaces in the future. However,
if engineers use A64 masters and servants in a VXI system, they
must have a VXI Resource Manager that understands the new
VXI 3.0 register definition. National Instruments has released
NI-VXI Resource Manager 5.0, which will configure A64
devices using existing NI-VXI controllers.
These new VXI 3.0 features (2eVME protocol, A64 addressing,
and the new register definitions) are the only additions to the
VXI specification. The new revision maintains the architecture
of the previous VXI specification, thereby ensuring compatibility with existing systems.
Applications for VXI 3.0
The higher throughput and 64-bit addressing of VXI 3.0 allows
the addition of high-speed modules to the VXI system. Given a
64-bit VXI controller with 2eVME support, engineers can use
the system RAM of the VXI controller directly from a 2eVME
capable VXI digitizer. If engineers allocate a buffer on the VXI
controller, and write the full 64-bit address of each buffer to the
digitizer, then the digitizer sends the data to the buffer using
2eVME transfers. Alternatively, the digitizer could hold the data,
which could be copied from the digitizer by the VXI controller
using 2eVME.
Engineers can make use of these new features with an existing controller if the controller has a VXI 3.0 capable Resource
Manager. Some VXI systems use the VXI Slot 0 controller as a

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2004

SPECIAL FEATURE

VITA Updates
resource manager, operator interface, and top-level commander.
These systems delegate control of some measurements to special purpose embedded computers (see Figure 3).
In this case, the 2eVME A64 Master manages the data acquisition and then communicates the results back to the top level
commander in Slot 0 using traditional VXI protocols.
It is worth noting that the software stack for implementing these
strategies is not complete. The VISA specification has yet to be
updated to identify A64 addresses or to initiate a 2eVME data
transfer, so engineers cannot currently create these examples
in an interoperable manner. Therefore, software like NI-VXI
Resource Manager 5.0 is just an initial step toward bringing
VXI 3.0 to test systems. Ω

Slot-0
Controller

Traditional VXI
Communication

VXI Resource Manager

Scott Kovner is the VXI Software Group Manager at
National Instruments. He was a member of the VXIbus System
Specification 3.0 Technical Working Group and a contributor
to the specification.
For further information, contact Scott at:
National Instruments
Tel: 512-683-6003
E-mail: scott.kovner@ni.com
Website: www.ni.com
Related information
VXIbus Consortium Website: www.vxibus.org
VXIbus System Specification 3.0 Announcement
Website: www.vxibus.org/pressreleases/pr01_19_04.html

2eVME Protocol
Across the VXIbus

Controller
2eVME A64 Master

I/O Module
2eVME A64 slave

Figure 3

RSC# 3101 @www.vmebus-systems.com/rsc

RSC# 3102 @www.vmebus-systems.com/rsc

VMEbus Systems / June 2004 / 31

RSC#
32 /@www.vmebus-systems.com/rsc
32
VMEbus Systems / June 2004

Multiprocessing

COTS TECHNOLOGY FEATURE

Distributed memory or shared memory?
By Doug Clarke

StarFabric unlocks the door to scalability as emerging systems leverage the
powerful interplay of standards-based software and hardware modules for both
shared memory and distributed memory platforms.
Distributed memory versus shared memory models draw a line that deeply divides
system architecture designs into one or
the other camp. The division is clear:
â–  Distributed memory favors memoryintensive processes where each
processor has access to the full
bandwidth of its memory.
â–  Shared memory benefits complex,
inter-processor communication with
CPU-intensive processes where
message-passing latency is critical.
It also favors tasks that require larger
memories where one 4-gig space
works better than four individual
1-gig spaces.

The hybrid open system model of DSM
uses both shared memory and distributed
memory architectures to achieve optimal
flexibility without performance or cost
compromises.
Because DSM make a difference in board
design, where programming models and
communication modes are transparent to
the system, the cost and complexity of
writing the software and the expense of
integrating totally different architectures
to fit various parts of a system are greatly
reduced. The way processors see memory

and communicate is at the heart of DSM,
which is shown in Figure 1.
Memory
To software, memory is simply a specific location where data is read from
and written to. It may be physical memory or virtual memory. It may be owned
entirely by the CPU that is running the
software, or it may be shared by several
CPUs. Memory can belong to another
CPU on the same SBC, to another SBC
in the same chassis, to a chassis across
the room, or in an aircraft via VMEbus,

When a system is either entirely memory
intensive or CPU/communication intensive, the choice is easy. Unfortunately,
most real-world systems require both.
Such systems can be built using distributed or shared memory architectures to
meet the needs of both CPU/communication and Memory-intensive processes.
But there are tradeoffs. The horsepower
intended for a CPU/communicationintensive process will be wasted on a
memory-intensive process. Likewise, the
memory bandwidth provided for memory-intensive tasks will be wasted on a
CPU/communication-intensive task.
Therefore, as platforms become larger
and more complex, the need to unify both
processes within an optimal system with
separate parts for CPU/communicationintensive tasks and memory-intensive
tasks becomes mission-critical.
An emerging open system model, Distributed Shared Memory (DSM), combines these design archetypes within a
unified development environment. DSM
enables system architects to simultaneously target and earmark resources for both
localized CPU-intensive processes and
localized memory-intensive processes.

RSC# 33 @www.vmebus-systems.com/rsc

VMEbus Systems / June 2004 / 33

Multiprocessing
PCI-Ring, or StarFabric. If the software can’t tell where the memory is and
the same process is used for setting up
memory – no matter where it is – then
memory can be shaped to fit the system
architecture. For those parts of the system that are memory intensive, a single
CPU can have dedicated memory. For
other parts that need the horsepower
of several CPUs to work on one set of
data, four CPUs can share memory. And
when one process is generating a large
block of data needed by another process,
it can generate the data directly into the
other CPU’s memory. DSM platforms
make memory appear local to a processor using memory-management software
such as GBM/MPIâ„¢ from Synergy.

COTS TECHNOLOGY FEATURE

cesses how to identify themselves and
find other processes on the network.
Another method, direct-memory mapping of shared memory over VME, PCIRing, or StarFabric enables processes to
send data in the shortest amount of time
and uses the hardware to ensure that the
data is intact and delivered correctly.
StarFabric, in particular, enables low-cost
scalability and low-latency switching on
VME-based platforms while delivering a
full-duplex bandwidth of 400 MBps and
class-of-service features essential to a
high availability design.
The DSM platform from Synergy Microsystems, Power Matrixâ„¢, enables system
architects to build flexible DSM solutions with custom modules for distributed
memory and shared memory architectures
(Figure 2). For example, low-end configurations can have as few as 5 to 20 CPUs
consisting of single, dual, and quad SBCs
in a 5-slot backplane where:

Communication
In process-to-process communication,
ease-of-use and standard protocols sometimes take priority over throughput and
latency. At other times, moving larger
blocks of data quickly and efficiently
is key. Clearly, one method alone is not
the best solution for all problems. For
instance, industry-standard protocols
such as 10/100/1000 Ethernet tell pro-

â–  Distributed memory on SBCs can be
shared via PCI-Ring.
â–  Each CPU can communicate via
GigE.

â–  All SBCs can share memory via the
VME backplane and StarFabric.
Doug Clarke is a senior software engineer at Synergy Microsystems where he
leads initiatives for clustered computing
platform optimization using low-latency
communication APIs and switch fabric
interconnects to build custom topologies.
Clarke holds a BS in computer science
from California Polytechnic Pomona.
For further information, contact Doug at:
Synergy Microsystems, Inc.
9605 Scranton Road , Suite 700
San Diego, CA 92121-1773
Tel: 888-479-6374
Fax: 858-452-0060
E-mail: dclarke@synergymicro.com
Website: www.synergymicro.com
Power Matrixâ„¢ and GBM/MPIâ„¢ are
trademarks or registered trademarks of
Synergy Microsystems, Inc. in the United
States, other countries, or both. Other
company product and service names may
be the trademarks or service marks of
others.

HighProcessing
Communication

Network
Protocols
Distributed
PCI

Distributed
Shared Memory
StarFabric

Distributed
StarFabric

PCI-X

1GBps

Gig-E

1000Mbps

PCI

Distributed
VME
SMP
Shared
Memory

Modules above this curve
are currently available.

Distributed
IP (GBM)

LowProcessing
Communication

532MBps

Distributed
IP (MPI)

100 Base-T
100Mbps

10 Base-T
10Mbps

CPU-Intensive

Memory-Intensive

System Size
As the system grows, Distributed Shared Memory environments are most likely to result.

Figure 1

34 / VMEbus Systems / June 2004

(c)2004 Synergy Microsystem s

COTS TECHNOLOGY FEATURE
Hybrid DSM Environment

Distributed Memory Module

Shared Memory Module

Modules *

Hydra QX and DX

Manta QX and DX

CPUs

Quad and Dual PPC 7447

Quad and Dual PPC 7457

Application

Memory-intensive

CPU-intensive

Architecture

Distributed memory

Shared memory

Inter-chassis communication

StarFabric
10/100/1000 trunked Ethernet

StarFabric
10/100/1000 Ethernet

Intra-chassis communication

StarFabric
10/100/1000 trunked Ethernet
VME via Tempe controller

StarFabric
10/100/1000 Ethernet
VME via Universe II controller

Intra-board communication

PCI-X Loop shared memory
1000 trunked Ethernet via built-in switch

Shared memory

I/Os

2 64-bit PMC sites
4 RS-232

2 64-bit PMC sites
4 RS-232
2 MPSC RS-422/485
Firewire

Main memory

QX - 256 MB to 1 GB DDR-SDRAM per CPU

QX - 256 MB to 2 GB DDR SDRAM (total)

DX - 256 MB to 2 GB DDR-SDRAM per CPU

DX - 256 MB to 2 GB DDR SDRAM (total)

CPU speed

1 GHz to 1.3 GHz

733 MHz to 1.3 GHz

RTOS/BSP

Linux SMP, VxWorks, INTEGRITY

Linux SMP, VxWorks, INTEGRITY

* Other DSM product series choices from Synergy include the air-cooled Raptor and the conduction-cooled Rhino dual-processor SBCs.
©2004 Synergy Microsystems, Inc.

Figure 2

RSC# 35 @www.vmebus-systems.com/rsc

VMEbus Systems / June 2004 / 35

Multiprocessing

COTS TECHNOLOGY FEATURE

Want to increase the performance of your
VMEbus-based systems?
Try a combination of asymmetric multiprocessing and
parallel processing
By Jürgen Eder

Today,VMEbus-based systems are used for such diverse applications as industrial automation,
transportation, communications, medical technology, video processing, and signal data processing.
High performance embedded applications in the commercial and government markets have evergrowing demands for raw processing power, a decrease in slot availability, and the need to interface
to I/O using a variety of technologies. Often,VMEbus-based systems are customized to suit the
needs of individual applications.VMEbus-based systems are also used in extreme temperatures
that require cooling.
Introduced in 1981, the venerable VMEbus has seen just about every conceivable permutation to
achieve performance gains. But do not fear; the VMEbus architecture has not run out of gas. Even
higher performance can be achieved cost effectively by using an asymmetric multiprocessing
approach where two processors on a single board share the workload. Parallel processing within
each processor can also be used for even more performance. In this article, Jürgen will describe
how asymmetric multiprocessing can be combined with parallel processing to greatly increase
the performance of VMEbus board applications.
Asymmetric multiprocessing
Asymmetric multiprocessing refers to
the type of multiprocessing where each
processor in a multiprocessor system
has its own operating system. In a basic
configuration, the user interface and the
network part of the system are implemented on the host CPU, and the I/O
modules provide additional real-time processing. The SBS VG5 shown in Figure 1

Figure 1

36 / VMEbus Systems / June 2004

will be used as an example. It is an ultracompact 6U VMEbus PowerPC board.
The block diagram for the board is shown
as Figure 2.
Three different operating systems can be
used with the VG5: VxWorks, Linux, and
LynxOS. In the asymmetric multiprocessing mode, two different operating systems
can run simultaneously on a card, with
different tasks being carried out separately. The board comes with one or two
processors; either a Motorola 800 MHz
PowerPC MPC7455 processor, or a 1.0 or
1.3 GHz Motorola PowerPC MPC7457
processor. Both processors have their own
chipset, access for a PCI Mezzanine Card
(PMC), L3-cache, DDR-RAM memory,
and Flash memory. These features allow
the processors to run independently.
Onboard functions are distributed meaningfully across both processors (nodes A

and B), and each CPU node has its own
private PCI-bus. A third PCI-bus and a
Field Programmable Gate Array (FPGA)
processor couple the CPU nodes together.
This allows one processor node to access
some of the functions of the other processor node. To increase performance, the
cache areas of each processor node are
separated. Memory caches L1 and L2 are
integrated within the CPUs, whereas the
L3 memory caches are external and are
therefore available for each node.
The asymmetric multiprocessing is coordinated via the FPGA processor using
approximately half of its available gates;
the other gates are used for standard functions and are user programmable. The
processors are synchronized via interrupts with the interrupt controllers residing within the FPGA, which considerably
expands the interrupt capability. As the
VMEbus is an asynchronous bus, mean-

COTS TECHNOLOGY FEATURE

Figure 2
ing that clocks are not used to coordinate
data transfers, data is passed between
modules using interlocked handshaking
signals; the slowest module participating
in the cycle sets the cycle speed of each
transfer. For fast data exchange between
the processors, the SBS VG5 employs a
64-bit PCI-X bus.
Parallel processing
Parallel processing refers to architecture
within a single processor that allows it
to perform more than one operation at
the same time. A differentiator of the
MPC7455/57 processor family is that it
is based on Motorola’s AltiVec technology, which features a vector-processing
engine designed to provide highly parallel operations. AltiVec allows for the
simultaneous execution of up to 16 operations in a single clock cycle, thereby
greatly accelerating embedded process-

ing operations for compute-intensive
applications.
The AltiVec technology also contains the
wide data paths and field operations that
are required to process multiple vector
processing requests. AltiVec offers considerable performance advantages over
other processors, which have to carry out
this type of processing sequentially and
at higher clock rates. The higher clock
speeds require more current and therefore
need more cooling. Because it employs
AltiVec technology, the MPC7455/57
processors use less current and do not
require on-board cooling fans.
Rugged versions
Optional rugged features are available for
applications that operate in environments
impacted by temperature, shock, vibration, humidity, dust, salt, or mist. Options

for ruggedization include conduction
cooling which is used mainly in military
and aerospace applications where convection cooling cannot be used. Conduction
cooling allows heat to conduct through the
Printed Circuit Board (PCB), or through a
conduction plate on the backside. Special
expanding card guides then transfer the
heat through rails and out to the chassis.
The cooling design enables the board to
be used in extended temperature ranges of
–40° to +85°C.
Other ruggedization features include
conformal coating for environmental protection, while stiffener bars and wedge
locks permit increased push loads and
oscillation loads. The VG5 only requires
30 watts of power to operate, which
enables cooler operation. Comparable
processors from other chip families
require much more power.

VMEbus Systems / June 2004 / 37

Multiprocessing
The VG5 simplifies testing through a
JTAG interface for access to the most
complex assemblies for testing, debugging, in-system device programming, and
hardware problem diagnosis. The JTAG
interface on the VG5 is located on the rear
I/O connectors, enabling the system to be
tested during runtime.

COTS TECHNOLOGY FEATURE

Conclusion
VMEbus-based systems are used for
applications that require increasing levels
of raw processing power and the need to
interface to I/O using a variety of technologies. The performance of VMEbus
can be increased in a cost-effective manner by using a combination of asymmetric
multiprocessing, and parallel processing

within each processor. This is good news
for many developers, as the VMEbus
supports a variety of compute-intensive
tasks and has maintained its popularity
as an important industrial and military
protocol.
Jürgen Eder has been with SBS
Technologies since February 1998.
Based in Augsburg, Germany, he
holds the position of product director
for the SBS CPU board products in the
commercial and government markets.
He has 13 years of experience in the
semiconductor industry, having worked
for the Intel Corporation in technical
training, field application, and European
marketing. Jürgen studied electronic
engineering and has application engineer experience in the industrial
automation market.
For further information, contact
Jürgen at:
SBS Technologies
Corporate Headquarters
2400 Louisiana Blvd. NE
Suite 5-600
Albuquerque, NM 87110
Toll free: 800-727-1553
Tel: 505-875-0600
Fax: 505-875-0400
E-mail: jeder@sbs.com
Website: www.sbs.com

RSC# 3801 @www.vmebus-systems.com/rsc

38 / VMEbus Systems / June 2004

RSC# 3802 @www.vmebus-systems.com/rsc

VMEbus
Systems / June 2004 / 39
RSC#
39 @www.vmebus-systems.com/rsc

RSC# 40 @www.vmebus-systems.com/rsc

40 / VMEbus Systems / June 2004

Intel Processors
Single Board Computers

Other SBC Processors

48

American ELTEC
E128

www.eltec.de/us
•

Eurocom 148

RTOS Products

50

Semiconductors
Semiconductor Products

•

Computer Modules

Real-Time Operating Systems

54

www.compumodules.com

SVA031

•

Concurrent Technologies

www.gocct.com

PP 100/01x

•

VP 100/010

•

VP 100/010-E

•

VP 100/01x

•

VP 101/010

•

VP 101/011

•

VP 101/01x

•

VP 101/01x-E

•

VP 101/01x-K

•

VP 110/010-E

•

VP 110/010-K

•

VP 110/011

•

VP 110/01x

•

VP 305/011-E

•

VP 305/01x

•

VP 307/01x

•

VP PSE/C1x

•

VP PSE/P3x

•

DENSAN Systems
DVE-486/20A
Dynatem
DHC
RSC# 41 @www.vmebus-systems.com/rsc

Xeon

44

Celeron

PowerPC Processors

Pentium 4 Mobile

41

Pentium III Mobile

Intel Processors

Pentium III

Single Board Computers

Pentium Mobile

Company Name
Model Number
Website

Pentium

VME product guide

PRODUCT GUIDE

www.densan.com
•
www.dynatem.com
•

continued on page 42
VMEbus Systems / June 2004 / 41

Intel Processors

Dynatem (continued)
DMC

GE Fanuc Automation
VMIVME-7658

•
•

www.gefanuc.com/embedded

VMIVME-7700

•

•

EM02

•

4231

EPC-1009

www.pentek.com
•
www.radisys.com
•

•

EPC-1316

VMIVME-7750

•

SBS Technologies

VMIVME-7751

•

V5A

•

VMIVME-7765

•

V5CXT

•

VMIVME-7766

•

VC7

•

VP7

•

•

VMIVME-7810

•

Xeon

A13

VMIVME-7740

VMIVME-7805

Celeron

www.menmicro.com

RadiSys Corp

•

Pentium 4 Mobile

MEN Micro

Pentek

•

Pentium III Mobile

Pentium III

Pentium Mobile

Pentium

Xeon

Celeron

Pentium 4 Mobile

PRODUCT GUIDE
Company Name
Model Number
Website

www.dynatem.com

DPC2
Pentium Board w/Windows NT

Pentium III Mobile

Pentium III

Pentium Mobile

Company Name
Model Number
Website

Pentium

Single Board Computers

•
www.sbs.com

VP9

•

General Micro Systems

www.gms4vme.com

VR7

Atlas-V2P4

•

VR9

Mariner II V158

•

Technoland

www.technoland.com
•

Mustang V255

•

TL-EmbSBC ET815

V130 Eliminator

•

Thales Computers

V158 Mariner

•

PENTX2

V160 Liberty

•

PENTX3

V161 Aurora

•

Vista Controls

V169 Powerhouse

•
•

Janz Computer

www.janzag.de
•

Kontron
400-H33E

www.kontron.com
•

Gamma7

42 / VMEbus Systems / June 2004

•

www.thalescomputers.com
•
•
www.vistacontrols.com

VCP P3A

V269 Equinox

VMOD-P5

•

Xycom

www.xycom.com

1506

•

XVME-653

•

XVME-660

•

XVME-661
•

•

•

RSC# 43 @www.vmebus-systems.com/rsc

VMEbus Systems / June 2004 / 43

PowerPC Processors
Single Board Computers
Company Name/Model Number
Actis

Website
www.actis-computer.com

VSBC-6862
Aitech

Company Name/Model Number
Concurrent Technologies (continued)

www.rugged.com

DENSAN Systems
DVE-P750/50

C101

DNA Enterprises

C210

VQCG4

C772

VQG4

C2700A

VS750

C5100

VSC750

C5110

Dy 4
www.eltec.de/us

BAB 760 PowerPC board
Artesyn Communication

www.artesyncp.com

CU 824

PM/PPC-440

CPU84

PM/PPC-750

IP-860
www.ballardtech.com

OmniBus VME

ELTEC Electronik

www.dy4.com

www.dynatem.com

www.eltec.com

BAB 740
www.ces.ch

Force Computers

MFCC 8441

CPU-695

MFCC 8442

PowerCore-6750

MFCC 8447

PowerCore-6750 SSIO

RIO2 8060 Target processor

GE Fanuc Automation

RIO2 8062

VMIVME-7050

RIO3 8064

General Micro Systems

RIO4 8070

Atlantis V191
www.gocct.com

V191 Atlantis

VP 740/20x

V194 Streamer

VP 741/10x

V294 Striker

VP 742/101-E

V394 Maverick
V51x Freedom

44 / VMEbus Systems / June 2004

www.dna-cs.com

SVME/DMV-182

BajaPPC 750

Concurrent Technologies

www.densan.com

SVME/DMV-181

Dynatem

CES

www.gocct.com

SVME/DMV-179

BajaPPC

Ballard Technology

Website

VP 742/20x

C100

American ELTEC

PRODUCT GUIDE

www.forcecomputers.com

www.gefanuc.com/embedded

www.gms4vme.com

PowerPC Processors
Single Board Computers
Company Name/Model Number

Website

ISP Technologies

www.isptechinc.com

Thunder

Company Name/Model Number
Motorola Computer Group (continued)

www.kontron.com

MVME2400

VMP1

MVME2600

VMP2

MVME2700

VMP60

MVME5100

VSBC-860

MVME5500
www.menmicro.com

MVME6100

A12

PPMC750

A12c

PrPMC750

A15

N.A.T.

B11

NICE-360

B12

Orion Technologies

EM04

PMC7500

Mercury Computer Systems

www.mc.com

Pentek

RACE Series 6U/9U

4205

RACE Series Multiport

4294

RACE++ AdapDev

4295

RACE++ PowerPC 7410 Daughtercard

Fibre Channel VME board

RACE++ Series PowerPC 7410 VME System

Prodrive
www.miriac.com

Radstone Technology

CPU86

8240/8245

CPU824

EP1A-8240

IP860

IMP1A

MIP860

PowerXpress PPC6

RSC01

PPC1A
www.momenco.com

Puma
Motorola Computer Group

www.nateurope.com

www.otisolutions.com

www.pentek.com

www.prodrive.nl

P3P4403

CPU84

Momentum Computer

mcg.motorola.com

MVME2300

IUC860

Miriac

Website

MVME2100

Kontron

MEN Micro

PRODUCT GUIDE

www.radstone.co.uk

PPC2A
PPC4

mcg.motorola.com

PPC4A

MVME1603e

VMEbus Systems / June 2004 / 45

PowerPC Processors
Single Board Computers
Company Name/Model Number
Radstone Technology (continued)

Website
www.radstone.co.uk

Company Name/Model Number
Thales Computers

PPC4B

CPU860-MD/MR/MM

PPC6

CTI 2000

PPC7A

CVME 603e

PPC8A

PMC860

PPCM1

PowerEngine7 Series

SBS Technologies

www.sbs.com

PRODUCT GUIDE

RA and RC PowerEngine7 SBCs

Power 7e

V2G4a-dual/V4G4a-quad

VG4

V4G4b

VG5

VCE405
www.seakr.com

PowerPC 603e Processor Card
SKY Computers

VMPC5a-mono/dual
VMPC6a

www.skycomputers.com

Merlin 500
Synergy Microsystems

VMPC6c
VMPC6d

www.synergymicro.com

VxG4a

Cougar 10

VxG4c

Falcon 10

Transtech DSP

Falcon D•10

VQ750

Falcon P•10

Vista Controls

Manta QX

GPCP

Raptor DX

PPCG4C

Raptor GX

PPCG4B

Raptor MX

VMETRO

Rhino 10

CP-MDR Series

Rhino DX

PowerMIDAS M5000 Series

Rhino MX

Voiceboard

SBC-VSS4

PMC750 H. 323/MGCP/SIP

VCMD
VGM5
VGMD
VGR5
VSS4

46 / VMEbus Systems / June 2004

www.thalescomputers.com

PowerNode3

Palomar SFX/DFX

SEAKR Engineering

Website

www.transtech-dsp.com

www.vistacontrols.com

www.vmetro.com

www.voiceboard.com

RSC# 47 @www.vmebus-systems.com/rsc

VMEbus Systems / June 2004 / 47

Other SBC Processors

Acquisition Technology
M312

www.acq.nl

www.rugged.com

DENSAN Systems

www.densan.com
•

DVE-R3900/20

•

C403

•

DVE-R4300/20

•

C404

•

DVE-R4600/20

•

C407

•

DVE-R5200/20

•

S127

•

DVE-SH7604

•

DVE-SH7700-SH3

•

American ELTEC

www.eltec.de/us

EUROCOM 17

•

DVE-SH7750

•

EUROCOM 27

•

DVE-SH7750E

•

AppTech

www.apptech-inc.com

Dynatem

www.dynatem.com

ATV206

•

CPU61/41

•

ATV307

•

CU-060/040

•

IP-460/IP-660

•

ATV349

•

ATM Computer
SBC X9165/SBC X9185

www.atm-computer.de
•

BVM

www.bvmltd.co.uk

SPARC

RISC

K5/K6

Coldfire

C6000

C40

680X0

Company Name
Model Number
Website

DVE-68k/42

•

Aitech

PRODUCT GUIDE
486

SPARC

RISC

K5/K6

Coldfire

C6000

C40

680X0

Company Name
Model Number
Website

486

Single Board Computers

EKF-Electronik

www.ekf.de

68250-IMOd30

•

EKF V250

•
•

BVME310

•

V095-ZAC

BVME3500

•

Force Computers

BVME370/380

•

CPU-54

•

BVME390/395

•

CPU-56

•

BVME4000

•

GE Fanuc Automation

BVME4500

•

VMIVME-9017/32

•

BVME6000

•

VMIVME-9066/32

•

BWI

www.bwi.com
•

Thunderbolt V5X

WVME143

•

Janz Computer

VP 683/10x

www.gocct.com

DVE-68k/42

www.densan.com
•

48 / VMEbus Systems / June 2004

VMOD-60

www.gms4vme.com
•
www.janzag.de
•

Kontron

•

DENSAN Systems

www.gefanuc.com/embedded

General Micro Systems

WVME141

Concurrent Technologies

www.forcecomputers.com

www.kontron.com

VM42

•

VM62

•

Other SBC Processors

Maxwell Technologies
MASS486

www.maxwell.com
•

MEN Micro

www.menmicro.com

Sun Microsystems

SPARC

RISC

K5/K6

Coldfire

UltraSPARC IIe

•

UltraSPARC III

•

•

Synergy Microsystems

B9L/B10

•

V25

•

V451/452

•

www.momenco.com

C6000

www.sun.com

A8/A9/A10

Momentum Computer

C40

680X0

486

PRODUCT GUIDE
Company Name
Model Number
Website

SPARC

RISC

K5/K6

Coldfire

C6000

C40

680X0

Company Name
Model Number
Website

486

Single Board Computers

www.synergymicro.com

Leopard

•

Thales Computers

www.thalescomputers.com

Leopard V

•

CM-CPU-40/60

•

Motorola Computer Group

mcg.motorola.com

Themis Computer

www.themis.com

MVME147

•

USPIIe/1

•

MVME162

•

USPIIe/2P2

•

MVME167

•

USPIIe/2P3

•

MVME172

•

USPIIe-USB

•

MVME177

•

USPIIi-1V

•

USPIIi-1v/1

•

Ovation Systems Ltd.

www.ovation.co.uk

PC-VME BRICK

•

USPIIi-1v/2c

•

VMEbus 486 PC

•

USPIIi-1v/2p

•

USPIIi-1v/3

•

USPIIIi

•

Pentek

www.pentek.com

4200A

•

4284

•

Titan Corporation

4285

•

SECS 68/486

4290

•

Tundra Semiconductor

4291

•

SCV64

4292

•

Vista Controls

4293

•

CM-CPU-60

RadiSys Corporation
EPC-1008
Sanritz Automation

www.radisys.com
•

www.titan.com
•
www.tundra.com
•
www.vistacontrols.com
•

Xycom Automation
XVME-654

www.xycom.com
•

www.sanritz.co.jp

XVME-658

•

SVA011

•

XVME-659

•

SVA012

•

Space Electronics
RTSCM

www.maxwell.com
•

VMEbus Systems / June 2004 / 49



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